Silicon Photonics Integration
Acacia’s recently announced its own Silicon Photonics monolithic Integrated Circuit is being used in the Coherent CFP platform. Acacia’s highly integrated full duplex Silicon Photonics single-chip PIC is low cost, low power, ultra-compact and can be manufactured in high volume. Coupled with Acacia’s internally developed low-power coherent ASIC, the company can deliver a 100G Coherent CFP product at half the cost and one-third the power and size of long haul 100G solutions.
Acacia’s PIC has numerous benefits compared to legacy optical components. It leverages mature CMOS processes resulting in high yield and low costs. With these processes, the wafers are large and yield is high resulting in further reduction in cost of each of these IC’s. Unlike legacy optical material, these integrated circuits are testable on wafer before they are packaged; this keeps the yields high. Also due to the materials being used, the PIC does not need any temperature control or hermetic packaging, keeping overall requirements simple and costs low.
Applications for the Technology
It has been well accepted that Silicon Photonics is well suited for data centers and shorter reach applications. What is not known is that Silicon Photonics is even better suited for Coherent applications like Metro where cost and size are critical. Many functions can be integrated into the Photonics Integrated Circuit die keeping the optical assembly simple. Acacia’s single-chip PIC provides breakthrough integration of all the critical optical elements required in the industry’s-first 100G coherent CFP module. And the entire PIC package consumes ~ 4W of power.
In summary, the Silicon Photonics PIC package dramatically reduces assembly and integration costs, delivers inherently high yield and provides cost, power and size reductions. All this makes it well suited for the Metro market segment.